Image from Google Jackets

FPGA Implementation of Reed Solomon Decoder

By: Contributor(s): Material type: TextTextLanguage: English Publication details: Department of Electronics and Communication Engineering Dr. B. R. Ambedkar National Institute of Technology TECHANo OF 144008, Punjab (India) 2023Description: 71pDDC classification:
  • 621
Dissertation note: THIS THESIS BELONGS TO DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
Tags from this library: No tags from this library for this title. Log in to add tags.
Star ratings
    Average rating: 0.0 (0 votes)

THIS THESIS BELONGS TO DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

MTECH 21204114

Managed by: Dr. D. P. Tripathi, Deputy Librarian, Central Library
For any query / question, please mail at circulation.liby@nitj.ac.in 

Click to see detail of visits and stats for this site

Powered by Koha