Verilog coding for logic synthesis (Record no. 54775)
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| fixed length control field | 00446nam a2200157Ia 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240724095642.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 210219s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 8126537013 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 LE-V |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Lee, Weng Fook |
| 245 #0 - TITLE STATEMENT | |
| Title | Verilog coding for logic synthesis |
| Statement of responsibility, etc | Weng FookLee |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Delhi |
| Name of publisher | Wiley India |
| Year of publication | 2013 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xxvi; 309p |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Verilog coding for logic synthesis |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books and Monographs |
| Lost status | Damaged status | Permanent Location | Current Location | Shelving location | Date acquired | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|
| Central Library, NIT Jalandhar | Central Library, NIT Jalandhar | General Stacks | 12.05.2016 | 621.395 LE-V | 95999 | Books and Monographs |