Introductory VHDL fronm simulation to synthesis (Record no. 47801)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00436nam a2200145Ia 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240924121632.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 210219s9999||||xx |||||||||||||| ||und|| |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 003.3 YA-I |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Yalamanchili Sudhakar |
| 245 #0 - TITLE STATEMENT | |
| Title | Introductory VHDL fronm simulation to synthesis |
| Statement of responsibility, etc | Yalamanchili Sudhakar |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Delhi |
| Name of publisher | Prarson |
| Year of publication | 2005 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 401p |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | VHDL fronm simulation to synthesis |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books and Monographs |
| Lost status | Damaged status | Permanent Location | Current Location | Shelving location | Date acquired | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|
| Central Library, NIT Jalandhar | Central Library, NIT Jalandhar | General Stacks | 06.03.2007 | 003.3 YA-I | 87284 | Books and Monographs |