Circuit design with VHDL (Record no. 47104)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00438nam a2200157Ia 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240919094748.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 210219s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 8120326830 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.381958 P372 |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Pedroni, Volnei A. |
| 245 #0 - TITLE STATEMENT | |
| Title | Circuit design with VHDL |
| Statement of responsibility, etc | Volnei A.Pedroni |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Delhi |
| Name of publisher | Prentice Hall of India |
| Year of publication | 2005 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xi,359p |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Circuit design with VHDL |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books and Monographs |
| Lost status | Damaged status | Permanent Location | Current Location | Shelving location | Date acquired | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|
| Central Library, NIT Jalandhar | Central Library, NIT Jalandhar | General Stacks | 13.07.2006 | 621.381958 P372 | 86520 | Books and Monographs | ||
| Central Library, NIT Jalandhar | Central Library, NIT Jalandhar | General Stacks | 13.07.2006 | 621.381958 P372 | 86521 | Books and Monographs |