CMOS: Circuit design layout & simulation (Record no. 45508)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00390nam a2200145Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 210219s9999||||xx |||||||||||||| ||und|| |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.39732 |
| Item number | BO-C |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Bokes,Jacob R |
| 245 #0 - TITLE STATEMENT | |
| Title | CMOS: Circuit design layout & simulation |
| Statement of responsibility, etc | Jacob RBokes |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 3rd |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Jersey |
| Name of publisher | John Wiley |
| Year of publication | 2010 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xxxiii,117 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books and Monographs |
| 950 ## - LOCAL HOLDINGS (RLIN) | |
| -- | 621.39732 BO-C |
| Lost status | Damaged status | Permanent Location | Current Location | Shelving location | Date acquired | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|
| Central Library, NIT Jalandhar | Central Library, NIT Jalandhar | General Stacks | 20.02.2021 | 84461 | Books and Monographs |